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Blog Review: October 19

FPGA design trends; silicon photonics; RISC history; adaptive headlights.

EDA Siemens Harry Foster examines trends related to various aspects of FPGA design and the increasing design complexity associated with the increasing number of embedded processor cores, asynchronous clock domains, and more security features.

Synopsis’ Twan Korthorst and Kenneth Larsen Take a look at silicon photonics, including the benefits of electronic integration, accelerating the development of photonic IC designs in markets, and why companies want to move to integrated lasers.

Cadences Paul McLellan looks back at the early days of RISC processors and the development of the IBM 801, which was originally designed to run a telephone switch.

Ansys’ Emmanuel Folin check how adaptive headlights adjust their beam in response to driving conditions and some of the challenges, and design and test them.

In a podcast, Arm’s Geof Charron talks to Mark Hambleton about what the “software definition” means and the benefits it could have for developers, consumers and the wider tech industry.

by Risk Jasper van Woudenberg verifies an effort to determine if Starlink user terminals are resistant to fault injection attacks.

Renesas Roger Wendelken emphasizes the importance of educating customers on the need for security, how to manage layers of security, and understanding the limitations of a device.

In a blog for SEMI, ASM International John Golightly argues that companies across the semiconductor value chain should participate in efforts to accelerate sustainability innovations, develop and adopt standards and processes, demystify current schemes for calculating emissions reductions carbon and share ways to meet carbon disclosure requirements.

Plus, check out the blogs featured in the latest Low Power-High Performance newsletter:

Cadence’s Tom Beckley examines what it takes to be successful with the packaged system.

Synopsys’ Manoz Palaparthi shows how to discover the root causes of the first full-chip LVSs faster.

Janet Attar from Siemens presents a case study on low-power, high-performance AI processors.

Arm’s Jack Melling shows how a lack of hardware and firmware standardization across SoCs can hinder the deployment of edge computing applications.

Keysight’s Don Dingee sees that workflows are changing and design can no longer be an isolated activity.

Jim Robinson of Cycuity offers four levels to assess current capabilities and take steps for end-to-end hardware security verification.

Jesse Allen

Jesse Allen

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Jesse Allen is a Knowledge Center Administrator and Editor at Semiconductor Engineering.